With the development of mobile systems and various application systems, the demand for flash memory devices that are non-volatile memories has increased. Flash memory devices are devices that are capable of storing data even when no power is supplied to them.
The structure of a flash memory device includes a data transmission block that provides data extracted from a memory array via individual pairs of bit lines to a page buffer block through each common bit line. The data transmission block includes power connection portions controlled such that each pair of bit lines is connected to a power voltage and select connection portions controlled such that each pair of bit lines is selectively connected to each common bit line.
In recent years, with an increase in the degree of integration of semiconductor memory devices including a flash memory devices, the size (pitch) and interval (space) of a pattern are reduced by applying double patterning technology (DPT). In the flash memory device, according to DPT, wirings of the pairs of bit lines are expanded with the same pitch from the memory array to power connection portions and select connection portions at the front stage of a page buffer. In this case, at the time of layout of the data transmission block of the flash memory device, a width in the horizontal direction is limited, and a layout length in the vertical direction is increased.